Quatech MPAP-100 User Manual

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MPAP-100
RS-232 PCMCIA
SYNCHRONOUS ADAPTER
for PCMCIA Card Standard compatible machines
User's Manual
QUATECH, INC. TEL: (330) 655-9000
5675 Hudson Industrial Parkway FAX: (330) 655-9010
Hudson, Ohio 44236 www.quatech.com
Quatech MPAP-100 User's Manual 1
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Summary of Contents

Page 1 - User's Manual

MPAP-100RS-232 PCMCIASYNCHRONOUS ADAPTERfor PCMCIA Card Standard compatible machinesUser's ManualQUATECH, INC. TEL: (330) 655-90005675 Hudson Ind

Page 2

S# The PCMCIA socket into which the MPAP-100 must be inserted for thisconfiguration to be used. This value is a decimal number ranging from 0 to 15.

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is helpful if the user allows Card Services to select resources instead of specifying them on thecommand line.

Page 4

3.2 DOS Client Driver examplesExample: Attempt to configure an MPAP-100 inserted into any socket with a base address andIRQ automatically assigned by

Page 5

3.3 MPAP-100 Enabler for DOSFor systems that are not using PCMCIA Card and Socket Services software, theMPAP-100 DOS enabler may be used to enable and

Page 6 - 1.1 System Requirements

The enabler requires a single desired configuration to be provided on the command line.The card will not be configured if the desired configuration is

Page 7 - 2 Hardware Installation

If configuration is successful, the enabler will display a message showing theconfiguration on the screen. If the MPAP-100 is not successfully config

Page 8

3.4 DOS Enabler ExamplesExample: Configure the MPAP-100 in socket 0 with a base address of 300H and IRQ 5. Software control of SYNCA will be enabled.

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4 Windows 95/98 InstallationWindows 95/98 maintains a registry of all known hardware installed in your computer.Inside this hardware registry Windows

Page 10 - 3.1.3 Hot Swapping

2. Click the "Next" button. Select the radio button for "Search for the best driver for yourdevice." Click the "Next"

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5. Windows will copy the INF file from the CD and display a final dialog indicating that theprocess is complete. Click the "Finish" button.

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WARRANTY INFORMATIONQuatech Inc. warrants the MPAP-100 to be free of defects for one (1) year from the dateof purchase. Quatech Inc. will repair or r

Page 13 - 3.3.3 Configuring a card

4.2 Viewing Resources with Device ManagerThe following instructions provide step-by-step instructions on viewing resources used bythe MPAP-100 in Wind

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6. If changes to the automatic configuration are necessary for compatibility with existingprograms, uncheck the "Use Automatic Settings" box

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5 OS/2 Software InstallationAn OS/2 client driver is provided with the MPAP-100. This client driver works withOS/2's Card and Socket Services to

Page 16 - 3.4 DOS Enabler Examples

addr (required) The base I/O address of the MPAP-100. This number must be athree-digit hexadecimal value ending in 0.irq (required) The interrupt lev

Page 17 - 4 Windows 95/98 Installation

5.3 OS/2 Client Driver Configuration ExamplesExample: Configure the MPAP-100 at base address 300 hex and IRQ 5. Configurationwill fail if any of the

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If PCMCIA support was not selected when OS/2 was installed, add it by using theSelective Install facility in the System Setup folder. Full PCMCIA sup

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6 Using the MPAP-100 with SyncdriveSyncdrive is a synchronous communications software driver package designed to aidusers of Quatech synchronous commu

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7 AddressingThe MPAP-100 occupies a continuous 16-byte block of I/O addresses. For example, ifthe base address is set to 300 hex, then the MPAP-100 w

Page 21 - 4.3 Configuration Options

8 InterruptsThe MPAP-100 will operate using the interrupt level (IRQ) assigned by the PCMCIAsystem. Interrupts can come from the SCC, the external FI

Page 22 - 5.1 System Requirements

9 SCC General InformationThe Serial Communications Controller (SCC) is a dual channel, multi-protocol datacommunications peripheral. The MPAP-100 pro

Page 23 - 5.2.3 Hot Swapping

Copyright 2001 Quatech, Inc.NOTICEThe information contained in this document is protected by copyright, and cannot bereproduced in any form without t

Page 24

9.1 Accessing the registersThe mode of communication desired is established and monitored through the bit valuesof the internal read and write registe

Page 25 - Socket Services separately

Example 3: Write data into the transmit buffer of channel A.mov dx, base ; load base addressout dx, al ; write data in ax to buffer Example 4: Read

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External/Status interrupt control WR15Miscellaneous control bits: baud rate generator, DPLL control, autoecho WR14Lower byte of baud rate time constan

Page 27 - 7 Addressing

9.2 Baud Rate Generator ProgrammingThe baud rate generator (hereafter referred to as the BRG) of the SCC consists of a 16-bitdown counter, two 8-bit t

Page 28 - 8 Interrupts

The MPAP-100 is a single-channel device. Portions of SCC channel B are used toaugment channel A. Channel B cannot be used for transmit, but may be u

Page 29 - 9 SCC General Information

9.5 SCC Incompatibility Warnings Due to the SCC implementation used by the MPAP-100, there are two minorincompatibilities that the software programme

Page 30 - 9.1 Accessing the registers

10 FIFO OperationThe MPAP-100 is equipped with 1024-byte external FIFOs in the transmit and receivedata paths. These FIFOs are implemented as extensi

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10.2.2 Receive FIFOThe receive FIFO can service the receiver of either channel A or channel B of the SCC.If RXSRC (bit 1) of the Configuration Registe

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10.3.1 Using channel A for both transmit and receiveThis is the mode in which most applications will run. Set RXSRC (bit 1) in theConfiguration Regi

Page 33 - 9.3 SCC Data Encoding Methods

10.3.2 Using channel B for receiveThe MPAP-100 supplies only limited support for SCC channel B. This mode, therefore,is not recommended for most appl

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3810.2.2 Receive FIFO ...3710.2.1 Transmit FIFO ...3710.2 Accessing

Page 35 - 9.5.1 Register Pointer Bits

10.4 FIFO status and controlSeveral registers are used to control the FIFOs and monitor their status. These registersare detailed in other chapters o

Page 36 - 10.2.1 Transmit FIFO

10.4.2 Resetting the FIFOsThe FIFOs are automatically disabled and reset at powerup or when the MPAP-100 isinserted into a PCMCIA socket. The transmi

Page 37 - 10.2.2 Receive FIFO

To make the external FIFOs more useful in byte-synchronous modes, the MPAP-100 canwatch for a given character to be transferred consecutively a specif

Page 38

10.7 Receive FIFO timeoutWith asynchronous operational modes, the same problem exists. Namely, how is one todetermine when a reception is complete?

Page 39

11 Communications RegisterThe Communications Register is used to set options pertaining to the clocks. The sourceand type of clock to be transmitted

Page 40 - 10.4.1 Interrupt status

receive unformatted serial data, as it allows the SCC receiver to be manuallyplaced into sync under program control. This bit is ignored if bit 6 is

Page 41 - 10.4.4 Controlling the FIFOs

12 Configuration RegisterThe Configuration Register is used to set the interrupt source and enable the interfacebetween the SCC and the external FIFOs

Page 42

Bit 1: RXSRC --- Receive FIFO DMA Source: Thisbit determines which SCC pins are used to control transmit and receive DMAtransactions between the SCC a

Page 43 - 10.7 Receive FIFO timeout

13 Interrupt Status RegisterThe Interrupt Status Register is used to determine the cause of an interrupt generated bythe MPAP-100. The address of thi

Page 44 - 11 Communications Register

14 FIFO Status RegisterThe FIFO Status Register is used to return current status information about the externalFIFOs. The address of this read-only r

Page 45

6422.3.3 Bad Parameters ...6322.3.2 Insufficient Number Of Command Line Arguments ...6322.3.1 Resources N

Page 46 - 12 Configuration Register

15 FIFO Control RegisterThe FIFO Control Register is used to control the external data FIFOs. The address of thisregister is Base+A (hex). Table 13

Page 47

16 Receive Pattern Character RegisterThe Receive Pattern Character Register is used to set the character value to be used inreceive pattern detection.

Page 48 - 13 Interrupt Status Register

17 Receive Pattern Count RegisterThe Receive Pattern Count Register is used to set the counter value to be used in receivepattern detection. The addr

Page 49 - 14 FIFO Status Register

18 Receive FIFO Timeout RegisterThe Receive FIFO Timeout Register is used to control the operation of the externalreceive FIFO timeout feature. The a

Page 50 - 15 FIFO Control Register

19 External ConnectionsThe MPAP-100 is configured as a Data Terminal Equipment (DTE) device, meeting theRS-232-D standard using a DB-25 male connector

Page 51

N/CN/CRxCLK (DTE)SYNCAN/CCDDGNDDSRCTSRTSRxDTxDCGND13121110987654321252423222120191817161514TM (OUTPUT)TxCLK (DTE)N/CN/CRLBK (OUTPUT)DTRN/CLLBK (OUTPUT

Page 52

* Not included in the official RS-232-D specificationComm. Reg. bit 7TMTEST MODEX25TRxCA pinDATXCLK (DTE)X24N/C23PCMCIA STSCHG signalCERINGX22Comm. Re

Page 53

20 DTE Interface SignalsCIRCUIT AB - SIGNAL GROUND CONNECTOR NOTATION: DGND DIRECTION: Not applicableThis conductor directly connects the DTE circui

Page 54 - 19 External Connections

CIRCUIT CC - DCE READY (DATA SET READY) CONNECTOR NOTATION: DSR DIRECTION: From DCEThis signal indicates the status of the local DCE by reporting to

Page 55 - 19.2 RING (pin 22)

CIRCUIT DB - TRANSMIT SIGNAL ELEMENT TIMING (DCE SOURCE) CONNECTOR NOTATION:TXCLK (DCE) DIRECTION: From DCEThis signal, generated by the DCE, provid

Page 56 - 19.3 Null-modem cables

1 Introduction The Quatech MPAP-100 is a PCMCIA Type II (5 mm) card and is PCMCIA PC CardStandard Specification 2.1 compliant. It provides a single-ch

Page 57 - 20 DTE Interface Signals

21 SpecificationsBus interface: PCMCIA PC Card Standard 2.1Physical Dimensions: Type II (5 mm) PCMCIA cardController: 85230-compatible 16-MHz Se

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22 Software TroubleshootingThis appendix discusses how to resolve some common problems sometimes encounteredwhen using the MPAP-100 configuration soft

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22.2.1 With Card and Socket ServicesThe enabler should NOT be used if any Card and Socket Services are present on thesystem. If Card and Socket Servi

Page 60 - 21 Specifications

The base address or IRQ value may be out of range. Make sure that the base address is ahexadecimal number between 100 hex and 3F0 hex ending in 0. M

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MPAP-100 User's ManualRevision 2.22March 2004P/N 940-0090-222Quatech MPAP-100 User's Manual i

Page 62

2 Hardware InstallationHardware installation for the MPAP-100 is a very simple process:1. Insert the MPAP-100 into a vacant PCMCIA Type II adapter soc

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3 DOS / Windows 3.x Software InstallationTwo DOS configuration software programs are provided with the MPAP-100: a clientdriver and a card enabler.

Page 64 - P/N 940-0090-222

3.1 MPAP-100 Client Driver for DOSIn order to use the MPAP-100 client driver, the system must be configured with Card andSocket Services software. Ca

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